Integrated Transceiver Design
CEESI Module Details| Institution: |
University of Southampton |
| Module Code | |
| Module Credits (level M): | 15 |
| Learning hours | 150 hours |
| Module Convenor: | W Redman-White |
| Tutors: | W Redman-White TBD (Soton) |
| Industrial Advisors: | W Redman-White (Philips Semiconducors, Cellular Americas
Division, USA) D Leenaerts (Philips Research, NL) +1 TBD, (Philips UK/France) |
| Delivery Mode: |
Module Aims
This module aims to bring together the system, circuit and
technology issues to be faced when realising a complete wireless transceiver
function in silicon for mass market use.
The course will start with a review of the system level issues, discussing applications,
modulation schemes and specifications. Particular emphasis will be given to
systems using digital modulation where data recovery schemes are important.
Popular architectures will be compared, eg superhet vs direct
conversion in terms of the IC implementation issues and the specifications of
the building blocks required. The question of which technology (principally
BICMOS vs CMOS) is most suited will be discussed. The course will then consider
the transistor level design of typical cells in an integrated rather than matched
environment. This will include LNA, mixer, IF and filtering, A/D interface,
and VCO
Learning Objectives
On successful completion of the module, the delegates will have obtained an appreciation of:
Background to the Module
Cellular telephone and local wireless data communications applications have fuelled an explosive demand for highly integrated radio transceiver functions. The architectures used and the design techniques used depart significantly from the classical matched impedance building block approach, and the whole radio system as well as the target technology must be considered in the design choices. This course aims to bring together the radio system and transistor level designers' views in the problem of low cost high performance radio design.
Prerequisite Knowledge
Assessment Weighting
| Assignment 1 | 10% |
| Assignment 2 | 25% |
| Examination | 65% |
Delivery and Assignments
Pre-Residential
Residential Week (34 hours contact time)
Post Residential Study
Syllabus
| Lectures | 26 hours |
| Laboratory Sessions | |
| Tutorials | 8 hours |
Review of radio signals, modulation
and demodulation schemes
AM, FM, PM, FSK, QPSK, QAMSignal Spectra; I/Q modulation and demodulation schemes;
Spread Spectrum systems, S/N vs BER :Partition between analogue and digital
signal processsing
Overview of common Radio System Specifications
Key RF spec points for AMPS, DECT, GSM, CDMA, Bluetooth, Hiperlan
RF IC technology and components
Passive components in RF technology and their models
Capacitors and resistors
Planar Inductors
Packages and bondwires
HF Bipolar transistors and models
SiGe bipolar
CMOS - HF circuit and noise models
Review of classical radio technique
definitions
Transmission lines, Matching networks, S-parameters, smith charts, noise figure,
Noise in A/D conversion process
Receiver Specs & Measurements
IP2/IP3, 1dB compression, etc
Origins of these
Matched system signal definitions vs On-chip signals
Review of filter Technologies
Passive RLC, SAW, on-chip analogue, digital
Receiver Architectures
Basic SuperhetImage frequencies
Single and double conversion
Choice of IF : low vs high vs DC
Other spurious responses
Frequency planning
Realisable B/W vs IF values
Double Superhet
I/Q Architectures
Gain & Phase
Matching Needs
Noise Figures and Gain distribution
LO Noise
A/D converter specs
LNA Design
Specifications
Bipolar designs.
Single transistor
Cascode
Differential
Input matching
Feedback techniques
Inductive degeneration
CMOS LNAs
RF and IF VGA Design
Specs and requirements
Variable vs switched gain
Gm variation
Signal path steering
Attenuator blocks
Bipolar and MOS implementations
Matching, linearity and noise variation
Mixer Design
Mixer requirements and specs
Input and output conditions
Bipolar mixers
"Gilbert" type
Other bipolar mixers
CMOS mixers
"Gilbert" equivalent
"Passive"
Sub-sampling
Image Suppression
Baseband Filtering
Filter requirements
Gm-C integrators
Gyrators
Op-Amp RC
Tuning schemes
Polyphase filters
Matching
Image Suppression
A/D Circuits
Where to partition chips
Anti-aliasing requirements with analogue
BB filter
Direct IF conversion
SD, SA and Folding
TX Architecture
Demands of Constant vs non-constant envelope modulation
Direct output
Upconversion
LO Feedthrough
Pulse formation by DAC
DAC Specs
Tx VGA Circuits
Driver linearity.
LO and synthesiser specifications
Tuning range, phase noise
LO and synthesiser circuits
Integrated Oscillators
Tuning circuits
High speed prescalers
Dual modulus division
Fractional N concepts
Phase detector circuits
Dead zone behaviour
Recommended Texts
| Razavi |
| Johns and Martin |
| Leenaerts |
Conference and Journal Papers
W Redman-White
University. of Southampton
Version 2 17/2/2002